The present application relates generally to an improved data processing apparatus and more specifically to a single-ended low-swing power-savings mechanism with process compensation.
Memory content on integrated circuit chips increases with each generation. However, with the power provided to the integrated circuit remaining the same and, thus, being a limiting factor, increases in memory content contributes to more and more of the total integrated circuit chip power. Thus, a current challenge is to reduce power utilized throughout the integrated circuit chip and, with the increases in memory content, the power utilized in processing memory operations without sacrificing performance.